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CD4011 NAND Logic Gate

So you look in your parts kit to make up the XNOR circuit from a previous blog and you realise that you are fresh out of CD4077 chips (not likely, got a bucket of them). So what to do? Fortunately you have a pile of CD4011 NAND Gate chips available and you happen to know that you can make any logic gate using either a NAND or a NOR gate. In fact they're called the universal logic gates.

    

XNOR from 5 NAND gates

So what about something other than making a XNOR gate, maybe an exciting rocket launch simulation?

In this scenario, three military personnel (Angus, Bertie and Charlise) have been given the go-for-launch codes and are sweating over the buttons to launch a rocket. Psychologists tell us that perhaps one person alone should not be solely responsible for the launch, and so the launch will only happen if any two, or all three, of the three personnel hit their big red buttons. It looks like this on a logic table, with "1" being "hit the button" and "0" being "didn't hit the button":

From this table we can deduce that the launch will take place (output of "1") if:

(A AND B) OR (A AND C) OR (B AND C)  =  A.B + B.C + A.C

Note that A.B.C is redundant so we can leave it off the list.

We can also use Boolean Algebra laws to boil this down from the "Launch" lines shown above. If we look at every launch line in the table above, there are four possibilities that result in a launch (output of "1"). If we represent a non-hit with an "overline" (e.g. If Angus didn't hit the button then it is  A) then launch is as follows (note that A.B is "A and B" whereas A+B is "A or B"):

Launch  =  A.B.C + A. B.C + A.B. C + A.B.C
              = B.C.( A + A) + A. B.C + A.B. C (Associative Law)
              = B.C + A. B.C + A.B. C (Complement Law)
              = B.(C+A. C) + A. B.C (Associative Law)
              = B.(C+A) + A. B.C (Complement Law)
              = B.C + A.B + A. B.C (Distributive Law)
              = B.C + A.(B+ B.C) (Associative Law)
              = B.C + A.(B+C) (Complement Law)
              = A.B + B.C + A.C

All of which is a long-winded way of saying if Angus and Bertie, or Bertie and Charlise, or Angus and Charlise, or all three push a button - happy days for the launch.

So assuming that we had an OR gate and an AND gate, we could program the scenario as follows.

6 2-way AND gates and 3 2-way OR gates showing Angus and Bertie with itchy fingers

But the blog title says "CD4011 NAND Logic Gate" so let's replace the AND/OR gates with the universal NAND gate.

6 2-way NAND gates, nobody pushing buttons

The purists out there (hi!) would instantly complain about uneven "propagation delays" in the diagram and fair enough too - thus we need to make sure that any path to launch is no shorter than any other, and so the final circuit has even paths as shown.

Even delays on each line, and Charlise trying to launch by herself

So let's build the circuit and then test it - to the bunker!

You might want to explore the boolean logic side of things a bit more, in which case I recommend this course from Stanford University and this one from the Hebrew University of Jerusalem.